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 DTC114EET1 SERIES Bias Resistor Transistor
NPN Silicon Surface Mount Transistor with Monolithic Bias Resistor Network
This new series of digital transistors is designed to replace a single device and its external resistor bias network. The BRT (Bias Resistor Transistor) contains a single transistor with a monolithic bias network consisting of two resistors; a series base resistor and a base-emitter resistor. The BRT eliminates these individual components by integrating them into a single device. The use of a BRT can reduce both system cost and board space. The device is housed in the SC-75/SOT-416 package which is designed for low power surface mount applications.
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NPN SILICON BIAS RESISTOR TRANSISTORS
* * * *
*
Simplifies Circuit Design Reduces Board Space Reduces Component Count The SC-75/SOT-416 package can be soldered using wave or reflow. The modified gull-winged leads absorb thermal stress during soldering eliminating the possibility of damage to the die. Available in 8 mm, 7 inch/3000 Unit Tape & Reel
COLLECTOR 3 1 BASE 2 EMITTER
MAXIMUM RATINGS (TA = 25C unless otherwise noted)
Rating Collector-Base Voltage Collector-Emitter Voltage Collector Current Symbol VCBO VCEO IC Value 50 50 100 Unit Vdc Vdc 2 mAdc 1 3
DEVICE MARKING AND RESISTOR VALUES
Device DTC114EET1 DTC124EET1 DTC144EET1 DTC114YET1 DTC143TET1 DTC123EET1 DTC143EET1 DTC143ZET1 DTC124XET1 DTC123JET1 Marking 8A 8B 8C 8D 8F 8H 8J 8K 8L 8M R1 (K) 10 22 47 10 4.7 2.2 4.7 4.7 22 2.2 R2 (K) 10 22 47 47 2.2 4.7 47 47 47 Shipping 3000/Tape & Reel CASE 463 SOT-416/SC-75 STYLE 1
(c) Semiconductor Components Industries, LLC, 2000
1
May, 2000 - Rev. 0
Publication Order Number: DTC114EET1/D
DTC114EET1 SERIES
THERMAL CHARACTERISTICS
Characteristic Total Device Dissipation, FR-4 Board (1.) @ TA = 25C Derate above 25C Thermal Resistance, Junction to Ambient (1.) Total Device Dissipation, FR-4 Board (2.) @ TA = 25C Derate above 25C Thermal Resistance, Junction to Ambient (2.) Junction and Storage Temperature Range Symbol PD 200 1.6 RJA PD 300 2.4 RJA TJ, Tstg 400 -55 to +150 mW mW/C C/W C 600 mW mW/C C/W Max Unit
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted)
Characteristic Symbol Min Typ Max Unit
OFF CHARACTERISTICS
Collector-Base Cutoff Current (VCB = 50 V, IE = 0) Collector-Emitter Cutoff Current (VCE = 50 V, IB = 0) Emitter-Base Cutoff Current (VEB = 6.0 V, IC = 0) DTC114EET1 DTC124EET1 DTC144EET1 DTC114YET1 DTC143TET1 DTC123EET1 DTC143EET1 DTC143ZET1 DTC124XET1 DTC123JET1 ICBO ICEO IEBO -- -- -- -- -- -- -- -- -- -- -- -- 50 50 -- -- -- -- -- -- -- -- -- -- -- -- -- -- 100 500 0.5 0.2 0.1 0.2 1.9 2.3 1.5 0.18 0.13 0.2 -- -- nAdc nAdc mAdc
Collector-Base Breakdown Voltage (IC = 10 A, IE = 0) Collector-Emitter Breakdown Voltage (3.) (IC = 2.0 mA, IB = 0)
V(BR)CBO V(BR)CEO
Vdc Vdc
ON CHARACTERISTICS (3.)
DC Current Gain (VCE = 10 V, IC = 5.0 mA) DTC114EET1 DTC124EET1 DTC144EET1 DTC114YET1 DTC143TET1 DTC123EET1 DTC143EET1 DTC143ZET1 DTC124XET1 DTC123JET1 hFE 35 60 80 80 160 8.0 15 80 80 80 -- 60 100 140 140 350 15 30 200 150 140 -- -- -- -- -- -- -- -- -- -- -- 0.25 Vdc
Collector-Emitter Saturation Voltage (IC = 10 mA, IB = 0.3 mA) (IC = 10 mA, IB = 5 mA) DTC123EET1 (IC = 10 mA, IB = 1 mA) DTC143TET1 DTC143ZET1/DTC124XET1 Output Voltage (on) (VCC = 5.0 V, VB = 2.5 V, RL = 1.0 k) DTC114EET1 DTC124EET1 DTC114YET1 DTC143TET1 DTC123EET1 DTC143EET1 DTC143ZET1 DTC124XET1 DTC123JET1 DTC144EET1
VCE(sat)
VOL -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- -- 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2 0.2
Vdc
(VCC = 5.0 V, VB = 3.5 V, RL = 1.0 k)
1. FR-4 @ Minimum Pad 2. FR-4 @ 1.0 x 1.0 Inch Pad 3. Pulse Test: Pulse Width < 300 s, Duty Cycle < 2.0%
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DTC114EET1 SERIES
ELECTRICAL CHARACTERISTICS (TA = 25C unless otherwise noted) (Continued)
Characteristic Output Voltage (off) (VCC = 5.0 V, VB = 0.5 V, RL = 1.0 k) (VCC = 5.0 V, VB = 0.25 V, RL = 1.0 k) DTC143TET1 DTC143ZET1 Input Resistor DTC114EET1 DTC124EET1 DTC144EET1 DTC114YET1 DTC143TET1 DTC123EET1 DTC143EET1 DTC143ZET1 DTC124XET1 DTC123JET1 DTC114EET1/DTC124EET1/DTC144EET1 DTC114YET1 DTC143TET1 DTC123EET1/DTC143EET1 DTC143ZET1 DTC124XET1 DTC123JET1 250 PD , POWER DISSIPATION (MILLIWATTS) Symbol VOH Min 4.9 Typ -- Max -- Unit Vdc
R1
7.0 15.4 32.9 7.0 3.3 1.5 3.3 3.3 15.4 1.54 0.8 0.17 -- 0.8 0.055 0.38 0.038
10 22 47 10 4.7 2.2 4.7 4.7 22 2.2 1.0 0.21 -- 1.0 0.1 0.47 0.047
13 28.6 61.1 13 6.1 2.9 6.1 6.1 28.6 2.86 1.2 0.25 -- 1.2 0.185 0.56 0.056
k
Resistor Ratio
R1/R2
200
150
100
50
RJA = 600C/W
0 - 50
0 50 100 TA, AMBIENT TEMPERATURE (C)
150
Figure 1. Derating Curve
r(t), NORMALIZED TRANSIENT THERMAL RESISTANCE
1.0 D = 0.5 0.2 0.1 0.05 0.02 0.01 0.01 SINGLE PULSE 0.001 0.00001 0.0001 0.001 0.01 0.1 t, TIME (s) 1.0 10 100 1000
0.1
Figure 2. Normalized Thermal Response
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DTC114EET1 SERIES
TYPICAL ELECTRICAL CHARACTERISTICS -- DTC114EET1
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 TA = -25C 25C 0.1 75C 1000 hFE , DC CURRENT GAIN (NORMALIZED) VCE = 10 V TA = 75C 25C -25C 100
0.01
0.001
0
20 40 IC, COLLECTOR CURRENT (mA)
50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 3. VCE(sat) versus IC
Figure 4. DC Current Gain
4 f = 1 MHz IE = 0 V TA = 25C
100 75C IC, COLLECTOR CURRENT (mA) 10
25C TA = -25C
Cob , CAPACITANCE (pF)
3
1
2
0.1
1
0.01 VO = 5 V 0 1 2 3 4 5 6 7 Vin, INPUT VOLTAGE (VOLTS) 8 9 10
0
0
10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
Figure 5. Output Capacitance
Figure 6. Output Current versus Input Voltage
10 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 25C 75C 1
0.1
0
10
20 30 IC, COLLECTOR CURRENT (mA)
40
50
Figure 7. Input Voltage versus Output Current
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DTC114EET1 SERIES
TYPICAL ELECTRICAL CHARACTERISTICS -- DTC124EET1
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 IC/IB = 10 25C 0.1 TA = -25C 75C hFE, DC CURRENT GAIN (NORMALIZED) 1000 VCE = 10 V TA = 75C 25C -25C 100
0.01
0.001 0 20 IC, COLLECTOR CURRENT (mA) 40 50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 8. VCE(sat) versus IC
Figure 9. DC Current Gain
4 f = 1 MHz IE = 0 V TA = 25C
100 IC, COLLECTOR CURRENT (mA)
75C
25C TA = -25C
Cob , CAPACITANCE (pF)
3
10
1
2
0.1
1
0.01 VO = 5 V
0
0
10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
0
2
4 6 Vin, INPUT VOLTAGE (VOLTS)
8
10
Figure 10. Output Capacitance
Figure 11. Output Current versus Input Voltage
100 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 10 75C 25C
1
0.1
0
10
20
30
40
50
IC, COLLECTOR CURRENT (mA)
Figure 12. Input Voltage versus Output Current
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DTC114EET1 SERIES
TYPICAL ELECTRICAL CHARACTERISTICS -- DTC144EET1
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 10 IC/IB = 10 1000 hFE , DC CURRENT GAIN (NORMALIZED) VCE = 10 V TA = 75C 25C -25C 100
1 25C 75C
TA = -25C 0.1
0.01 0 20 40 IC, COLLECTOR CURRENT (mA) 50
10
1
10 IC, COLLECTOR CURRENT (mA)
100
Figure 13. VCE(sat) versus IC
Figure 14. DC Current Gain
1 f = 1 MHz IE = 0 V TA = 25C
100 75C IC, COLLECTOR CURRENT (mA) 10
25C TA = -25C
0.8 Cob , CAPACITANCE (pF)
0.6
1
0.4
0.1
0.2
0.01 VO = 5 V 0 2 4 6 Vin, INPUT VOLTAGE (VOLTS) 8 10
0
0
10 20 30 40 VR, REVERSE BIAS VOLTAGE (VOLTS)
50
0.001
Figure 15. Output Capacitance
Figure 16. Output Current versus Input Voltage
100 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 10 25C 75C
1
0.1 0 10 20 30 40 50 IC, COLLECTOR CURRENT (mA)
Figure 17. Input Voltage versus Output Current
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DTC114EET1 SERIES
TYPICAL ELECTRICAL CHARACTERISTICS -- DTC114YET1
VCE(sat) , MAXIMUM COLLECTOR VOLTAGE (VOLTS) 1 hFE, DC CURRENT GAIN (NORMALIZED) IC/IB = 10 TA = -25C 25C 0.1 75C 300 VCE = 10 250 25C 200 -25C 150 100 50 0 TA = 75C
0.01
0.001
0
20 40 60 IC, COLLECTOR CURRENT (mA)
80
1
2
4
6
8 10 15 20 40 50 60 70 80 IC, COLLECTOR CURRENT (mA)
90 100
Figure 18. VCE(sat) versus IC
Figure 19. DC Current Gain
4 3.5 Cob , CAPACITANCE (pF) 3 2.5 2 1.5 1 0.5 0 0 2 4 6 8 10 15 20 25 30 35 VR, REVERSE BIAS VOLTAGE (VOLTS) 40 45 50 f = 1 MHz lE = 0 V TA = 25C
100 TA = 75C IC, COLLECTOR CURRENT (mA) 25C
-25C 10
VO = 5 V 1
0
2
4 6 Vin, INPUT VOLTAGE (VOLTS)
8
10
Figure 20. Output Capacitance
Figure 21. Output Current versus Input Voltage
10 VO = 0.2 V V in , INPUT VOLTAGE (VOLTS) TA = -25C 25C 75C
1
0.1
0
10
20 30 IC, COLLECTOR CURRENT (mA)
40
50
Figure 22. Input Voltage versus Output Current
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DTC114EET1 SERIES
TYPICAL APPLICATIONS FOR NPN BRTs
+12 V
ISOLATED LOAD
FROM P OR OTHER LOGIC
Figure 23. Level Shifter: Connects 12 or 24 Volt Circuits to Logic
+12 V
VCC
OUT IN LOAD
Figure 24. Open Collector Inverter: Inverts the Input Signal
Figure 25. Inexpensive, Unregulated Current Source
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DTC114EET1 SERIES
MINIMUM RECOMMENDED FOOTPRINTS FOR SURFACE MOUNTED APPLICATIONS Surface mount board layout is a critical portion of the total design. The footprint for the semiconductor packages must be the correct size to insure proper solder connection interface between the board and the package. With the correct pad geometry, the packages will self align when subjected to a solder reflow process.
0.5 min. (3x)
TYPICAL SOLDERING PATTERN Unit: mm 0.5 min. (3x)
1.4
SOT-416/SC-75 POWER DISSIPATION The power dissipation of the SOT-416/SC-75 is a function of the pad size. This can vary from the minimum pad size for soldering to the pad size given for maximum power dissipation. Power dissipation for a surface mount device is determined by TJ(max), the maximum rated junction temperature of the die, RJA, the thermal resistance from the device junction to ambient; and the operating temperature, TA. Using the values provided on the data sheet, PD can be calculated as follows:
PD = TJ(max) - TA RJA
into the equation for an ambient temperature TA of 25C, one can calculate the power dissipation of the device which in this case is 200 milliwatts.
PD = 150C - 25C = 200 milliwatts 600C/W
The values for the equation are found in the maximum ratings table on the data sheet. Substituting these values
The 600C/W assumes the use of the recommended footprint on a glass epoxy printed circuit board to achieve a power dissipation of 200 milliwatts. Another alternative would be to use a ceramic substrate or an aluminum core board such as Thermal CladTM. Using a board material such as Thermal Clad, a higher power dissipation can be achieved using the same footprint.
SOLDERING PRECAUTIONS The melting temperature of solder is higher than the rated temperature of the device. When the entire device is heated to a high temperature, failure to complete soldering within a short time could result in device failure. Therefore, the following items should always be observed in order to minimize the thermal stress to which the devices are subjected. * Always preheat the device. * The delta temperature between the preheat and soldering should be 100C or less.* * When preheating and soldering, the temperature of the leads and the case must not exceed the maximum temperature ratings as shown on the data sheet. When using infrared heating with the reflow soldering method, the difference should be a maximum of 10C. * The soldering temperature and time should not exceed 260C for more than 10 seconds. * When shifting from preheating to soldering, the maximum temperature gradient should be 5C or less. * After soldering has been completed, the device should be allowed to cool naturally for at least three minutes. Gradual cooling should be used as the use of forced cooling will increase the temperature gradient and result in latent failure due to mechanical stress. * Mechanical stress or shock should not be applied during cooling. * Soldering a device without preheating can cause excessive thermal shock and stress which can result in damage to the device.
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EEE EEE EEE EEE EEE EEE
0.5 1
EEE EEE EEE
DTC114EET1 SERIES
SOLDER STENCIL GUIDELINES Prior to placing surface mount components onto a printed circuit board, solder paste must be applied to the pads. A solder stencil is required to screen the optimum amount of solder paste onto the footprint. The stencil is made of brass or stainless steel with a typical thickness of 0.008 inches. The stencil opening size for the surface mounted package should be the same as the pad size on the printed circuit board, i.e., a 1:1 registration.
TYPICAL SOLDER HEATING PROFILE For any given circuit board, there will be a group of control settings that will give the desired heat pattern. The operator must set temperatures for several heating zones, and a figure for belt speed. Taken together, these control settings make up a heating "profile" for that particular circuit board. On machines controlled by a computer, the computer remembers these profiles from one operating session to the next. Figure 26 shows a typical heating profile for use when soldering a surface mount device to a printed circuit board. This profile will vary among soldering systems but it is a good starting point. Factors that can affect the profile include the type of soldering system in use, density and types of components on the board, type of solder used, and the type of board or substrate material being used. This profile shows temperature versus time. The line on the graph shows the actual temperature that might be experienced on the surface of a test board at or near a central solder joint. The two profiles are based on a high density and a low density board. The Vitronics SMD310 convection/infrared reflow soldering system was used to generate this profile. The type of solder used was 62/36/2 Tin Lead Silver with a melting point between 177-189C. When this type of furnace is used for solder reflow work, the circuit boards and solder joints tend to heat first. The components on the board are then heated by conduction. The circuit board, because it has a large surface area, absorbs the thermal energy more efficiently, then distributes this energy to the components. Because of this effect, the main body of a component may be up to 30 degrees cooler than the adjacent solder joints.
STEP 1 PREHEAT ZONE 1 "RAMP" 200C
STEP 2 STEP 3 VENT HEATING "SOAK" ZONES 2 & 5 "RAMP"
STEP 5 STEP 4 HEATING HEATING ZONES 3 & 6 ZONES 4 & 7 "SPIKE" "SOAK" 170C 160C
STEP 6 STEP 7 VENT COOLING 205 TO 219C PEAK AT SOLDER JOINT
DESIRED CURVE FOR HIGH MASS ASSEMBLIES 150C
150C 140C SOLDER IS LIQUID FOR 40 TO 80 SECONDS (DEPENDING ON MASS OF ASSEMBLY)
100C 100C
DESIRED CURVE FOR LOW MASS ASSEMBLIES 50C
TIME (3 TO 7 MINUTES TOTAL)
TMAX
Figure 26. Typical Solder Heating Profile
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DTC114EET1 SERIES
PACKAGE DIMENSIONS SC-75 (SOT-416) CASE 463-01 ISSUE B
-A- S
2 3 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. DIM A B C D G H J K L S MILLIMETERS MIN MAX 0.70 0.80 1.40 1.80 0.60 0.90 0.15 0.30 1.00 BSC --- 0.10 0.10 0.25 1.45 1.75 0.10 0.20 0.50 BSC INCHES MIN MAX 0.028 0.031 0.055 0.071 0.024 0.035 0.006 0.012 0.039 BSC --- 0.004 0.004 0.010 0.057 0.069 0.004 0.008 0.020 BSC
G -B-
1
D 3 PL 0.20 (0.008)
M
B K
0.20 (0.008) A
J
C L H
STYLE 2: PIN 1. ANODE 2. N/C 3. CATHODE STYLE 3: PIN 1. ANODE 2. ANODE 3. CATHODE
STYLE 1: PIN 1. BASE 2. EMITTER 3. COLLECTOR
STYLE 4: PIN 1. CATHODE 2. CATHODE 3. ANODE
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DTC114EET1 SERIES
Thermal Clad is a trademark of the Bergquist Company
ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. "Typical" parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including "Typicals" must be validated for each customer application by customer's technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer.
PUBLICATION ORDERING INFORMATION
NORTH AMERICA Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303-675-2175 or 800-344-3860 Toll Free USA/Canada Fax: 303-675-2176 or 800-344-3867 Toll Free USA/Canada Email: ONlit@hibbertco.com Fax Response Line: 303-675-2167 or 800-344-3810 Toll Free USA/Canada N. American Technical Support: 800-282-9855 Toll Free USA/Canada EUROPE: LDC for ON Semiconductor - European Support German Phone: (+1) 303-308-7140 (M-F 1:00pm to 5:00pm Munich Time) Email: ONlit-german@hibbertco.com French Phone: (+1) 303-308-7141 (M-F 1:00pm to 5:00pm Toulouse Time) Email: ONlit-french@hibbertco.com English Phone: (+1) 303-308-7142 (M-F 12:00pm to 5:00pm UK Time) Email: ONlit@hibbertco.com EUROPEAN TOLL-FREE ACCESS*: 00-800-4422-3781 *Available from Germany, France, Italy, England, Ireland CENTRAL/SOUTH AMERICA: Spanish Phone: 303-308-7143 (Mon-Fri 8:00am to 5:00pm MST) Email: ONlit-spanish@hibbertco.com ASIA/PACIFIC: LDC for ON Semiconductor - Asia Support Phone: 303-675-2121 (Tue-Fri 9:00am to 1:00pm, Hong Kong Time) Toll Free from Hong Kong & Singapore: 001-800-4422-3781 Email: ONlit-asia@hibbertco.com JAPAN: ON Semiconductor, Japan Customer Focus Center 4-32-1 Nishi-Gotanda, Shinagawa-ku, Tokyo, Japan 141-0031 Phone: 81-3-5740-2745 Email: r14525@onsemi.com ON Semiconductor Website: http://onsemi.com
For additional information, please contact your local Sales Representative.
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DTC114EET1/D


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